Project Manager

We're hiring a Project Manager to coordinate multiple parallel ASIC programs, manage partner engineer engagements, and serve as the operational backbone of our growing team. You'll keep schedules honest, track deliverables, and unblock founders from day-to-day coordination work.

Responsibilities

Own program-level schedule and dependencies for active IDM projects Coordinate with partner engineering teams (contractor SOWs, status, escalations) Run sprint planning, status reporting, and program reviews Manage cross-team dependencies between ASIC, AI, platform, and AMS R&D teams Own program-level customer communication (status reports, milestone reviews)

Requirements

5+ years project or program management in technical environments Hardware/semiconductor industry experience strongly preferred Strong organizational skills schedules, dependencies, risk tracking Excellent written and spoken communication Comfort holding senior engineers accountable to commitments Bonus: PMP, PRINCE2, or equivalent certification Experience managing distributed teams across time zones Background coordinating partner / contractor engineering Familiarity with chip design project lifecycles (RTL tape-out silicon)

Benefits

Direct impact on product direction and engineering culture from day one Work alongside a senior, founder-led team with deep semiconductor industry experience Cairo-based engineering team with US headquarters; remote-friendly working model Competitive compensation with meaningful stock options for early hires Work on technically substantial problems not maintenance work Desired Candidate Profile 5+ years project or program management in technical environments Hardware/semiconductor industry experience strongly preferred Strong organizational skills schedules, dependencies, risk tracking Excellent written and spoken communication Comfort holding senior engineers accountable to commitments PMP, PRINCE2, or equivalent certification Experience managing distributed teams across time zones Background coordinating partner / contractor engineering Familiarity with chip design project lifecycles (RTL tape-out silicon)